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Tags: 22BCE0268 SANCHITA JINDAL

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Untitled

Untitled

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Untitled

Untitled

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Task1 F'(SOP) NAND Impementation

Task1 F'(SOP) NAND Impementation

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TASK1 F'(POS) NOR Implementation

TASK1 F'(POS) NOR Implementation

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Untitled

Untitled

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Task2_Half_Adder

Task2_Half_Adder

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Task II Full Adder

Task II Full Adder

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Task II Half Subtrator

Task II Half Subtrator

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Task II Full Subtractor

Task II Full Subtractor

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Task II 4-Bit Adder

Task II 4-Bit Adder

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Task II 2x2 Multiplier

Task II 2x2 Multiplier

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2:1 Multiplexer circuit using NOR logic

2:1 Multiplexer circuit using NOR logic

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Untitled

Untitled

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2:1 MUX NAND IMPLEMENTATION

2:1 MUX NAND IMPLEMENTATION

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2:1 MUX NOR IMPLEMENTATION

2:1 MUX NOR IMPLEMENTATION

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Task 1 Multiplexer

Task 1 Multiplexer

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Half Adder using 4:1 MUX

Half Adder using 4:1 MUX

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Half Subtractor using 4:1 MUX

Half Subtractor using 4:1 MUX

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Full Subtractor using 4:1 MUX

Full Subtractor using 4:1 MUX

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Full Adder Using 4:1 MUX

Full Adder Using 4:1 MUX

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Task 1 using 8:1 MUX

Task 1 using 8:1 MUX

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0 Stars     9 Views

Full adder using 8:1 MUX

Full adder using 8:1 MUX

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0 Stars     4 Views

Full Subtractor using 8:1 MUX

Full Subtractor using 8:1 MUX

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0 Stars     5 Views

Task 1 using decoder SOP

Task 1 using decoder SOP

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0 Stars     6 Views

Task 1 using 4:16 Decoder POS

Task 1 using 4:16 Decoder POS

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1Bit ALU

1Bit ALU

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4 Bit ALU

4 Bit ALU

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2:1 MUX POS OAI

2:1 MUX POS OAI

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Task 1 SOP Active Low Logic

Task 1 SOP Active Low Logic

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Task 1 POS Active High Logic

Task 1 POS Active High Logic

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Untitled

Untitled

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project.name
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project.name
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project.name
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project.name
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project.name
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project.name
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SISO Shift Register

SISO Shift Register

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SIPO Shift Register

SIPO Shift Register

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PIPO Shift Register

PIPO Shift Register

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PIPO Shift Register

PIPO Shift Register

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Bidirectional Shift Register

Bidirectional Shift Register

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random counter

random counter

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Mod N Counter

Mod N Counter

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cat2 B1 q2

cat2 B1 q2