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HW 4
HW 42421 TO 84-2-1
2421 TO 84-2-1COMMON CATHODE WITH DON'T CARES
COMMON CATHODE WITH DON'T CARESCOMMON ANODE with / without DON'T CARE
COMMON ANODE with / without DON'T CARECAT 2 Q2
CAT 2 Q2Q1 THEORY
Q1 THEORYhw 5
hw 5F'16:1 MUX
F'16:1 MUX8:1 A
8:1 AC
CB8X1
B8X1C1
C1b1
b1code1
code1CODE2
CODE2CODE3
CODE3CODE4
CODE474LS194 TASK 5
74LS194 TASK 53*8 decoder using 2*4
3*8 decoder using 2*43*8 DECODER USING TWO 2*4 DECODERS
3*8 DECODER USING TWO 2*4 DECODERS3 by 8 decoder using only two (2 by 4)
3 by 8 decoder using only two (2 by 4)4:16 decoder using 3:8
4:16 decoder using 3:8REG NO USING DECODER
REG NO USING DECODERHW 4
HW 4HW -3
HW -3DLCD THEORY TASK-1
DLCD THEORY TASK-1DLCD DA1
DLCD DA1DLCD DA1
DLCD DA1DLCD DA1
DLCD DA1task v homework dlcd PIPO SHIFT REGISTER USING DFF
task v homework dlcd PIPO SHIFT REGISTER USING DFFtask 5hw nand gate circuit
task 5hw nand gate circuitCOMMON ANODE WITHOUT DON'T CARES
COMMON ANODE WITHOUT DON'T CARESCAT 1 Q4
CAT 1 Q4CAT 1 Q7
CAT 1 Q7CAT 1 Q7
CAT 1 Q7CAT 1 Q8
CAT 1 Q8CAT 1 Q8
CAT 1 Q8CAT 1 Q5
CAT 1 Q5CAT 1 Q5
CAT 1 Q5CAT 2 Q4
CAT 2 Q4CAT 2 Q5 DECODER CIRCUIT
CAT 2 Q5 DECODER CIRCUITCAT 2 Q5 DECODER CIRCUIT
CAT 2 Q5 DECODER CIRCUITCAT 2 Q5 - 4:16 Decoder using NOR logic.
CAT 2 Q5 - 4:16 Decoder using NOR logic.CAT 2 Q7
CAT 2 Q7CAT 2 Q7
CAT 2 Q7CAT 2 Q9
CAT 2 Q9CAT 2 Q8
CAT 2 Q8CAT 2 Q9
CAT 2 Q914 LAB PRACTICE
14 LAB PRACTICE14 LAB PRACTICE
14 LAB PRACTICEPRATEEK LAB HW
PRATEEK LAB HWFAT 20MIC0130
FAT 20MIC01303:8 DECODER USING 2:4 DECODER
3:8 DECODER USING 2:4 DECODER3 by 8 decoder using only two (2 by 4)
3 by 8 decoder using only two (2 by 4)3:8 DECODER USING 2:4
3:8 DECODER USING 2:4CAT 1 Q4
CAT 1 Q4D
DTASK 3 16:1MUX DESIGN
TASK 3 16:1MUX DESIGNA1
A1D
DUniversal Shift Register
Universal Shift RegisterCAT 1 Q4
CAT 1 Q4Q1-SEVEN SEGMENT DECODER TO DISPLAY NAME & REG NO
Q1-SEVEN SEGMENT DECODER TO DISPLAY NAME & REG NOhomework 32:1 using 4:1 mux
homework 32:1 using 4:1 muxCOMMON CATHODE WITHOUT DON'T CARE
COMMON CATHODE WITHOUT DON'T CAREDesign 16:4 Encoder using 4:2 Encoder
Design 16:4 Encoder using 4:2 Encoder4:16 decoder using 3:8
4:16 decoder using 3:8DLCD TASK3 16:1 MUX
DLCD TASK3 16:1 MUXMAG COMPARATOR Q9
MAG COMPARATOR Q93:8 DECODER USING 2:4 DECODER
3:8 DECODER USING 2:4 DECODER74LS194 TASK 5
74LS194 TASK 53*8 decoder using 2*4
3*8 decoder using 2*43:8 DECODER USING 2:4 DECODER
3:8 DECODER USING 2:4 DECODER4:16 decoder using 2:4 decoders
4:16 decoder using 2:4 decodersMid-Term Assignment
Mid-Term AssignmentCOMMON CATHODE with / without DON'T CARE
COMMON CATHODE with / without DON'T CAREExperiment 12 : Verification of truth table of 4 bit bidirectional shift register
Experiment 12 : Verification of truth table of 4 bit bidirectional shift registerCOMMON CATHODE with/without DON'T CARES [ 1:16 DE-MULTIPLEXER ]
COMMON CATHODE with/without DON'T CARES [ 1:16 DE-MULTIPLEXER ]CAT 2 Q2
CAT 2 Q2CAT 2 Q3
CAT 2 Q3CAT 2 Q3
CAT 2 Q3CAT 2 Q4
CAT 2 Q4CAT 2 Q8
CAT 2 Q84:16 decoder using 2:4 decoders
4:16 decoder using 2:4 decodersPARALLEL ADDER Q8 DA 1
PARALLEL ADDER Q8 DA 1COMMON ANODE with/without DON'T CARES [1:16 DE-MULTIPLEXER]
COMMON ANODE with/without DON'T CARES [1:16 DE-MULTIPLEXER]CAT 2 Q5 - 4:16 Decoder using NOR logic.
CAT 2 Q5 - 4:16 Decoder using NOR logic.COMMON ANODE WITH DON'T CARES 16:1 MUX
COMMON ANODE WITH DON'T CARES 16:1 MUX32 to 1 mux using 4 to 1 mux
32 to 1 mux using 4 to 1 muxCAT 1 Q4
CAT 1 Q4COMMON ANODE WITH DON'T CARES 16:1 MUX
COMMON ANODE WITH DON'T CARES 16:1 MUXDesign 16:4 Encoder using 4:2 Encoder
Design 16:4 Encoder using 4:2 Encoder4 bit PIPO shift Register
4 bit PIPO shift RegisterExperiment 8
Experiment 8