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Incubated From:
Author: krishnaraj
Project access type: Public
Description:
1) VERIFICATION OF LOGIC GATES
2)DESIGN OF HALF ADDERS, FULL ADDERS
3) DESIGN OF HALF SUBTRACTOR, FULL SUBTRACTOR
4) Y=AB'+A'B
F(A,B,C)=(A'B+C) XNOR (AC'+BC).
Created: Feb 01, 2021
Updated: Aug 26, 2023
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