Deld 2 (a)
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Author: Anuranjan Pandey

Project access type: Public

Description:

Draw Truth table, K-Map , Circuit Diagram , and simulate it for following :

1. Logic Gates : AND, OR,NOT,NAND, NOR

2. Boolean Expression : 

 Y = AB+(A+B)(A'+B)

Y(A,B,C,D)= m(0,2,4,7,11,13,15)  ( Consider minterm)

Created: Aug 18, 2020

Updated: Aug 26, 2023


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