Anuranjan Pandey - Circuits

Anuranjan Pandey

Member since: 3 years

Educational Institution: Army Institute of Technology Pune

Country: India

D to SR

D to SR

Public

project.name

8:1 MUX using 2:1 MUX

8:1 MUX using 2:1 MUX

Public

project.name

seq detect 101

seq detect 101

Public

project.name

JK to T

JK to T

Public

project.name

T to D

T to D

Public

project.name

110 detector

110 detector

Public

project.name

seq gen odd

seq gen odd

Public

project.name

SR flip flop

SR flip flop

Public

project.name

1bit Comparator

1bit Comparator

Public

project.name

seq gen prime

seq gen prime

Public

project.name

2bit synchronous up counter

2bit synchronous up counter

Public

project.name

T to SR Flip Flop

T to SR Flip Flop

Public

project.name

MOD N SYNCHRONOUS COUNTER

MOD N SYNCHRONOUS COUNTER

Public

project.name

JK to SR

JK to SR

Public

project.name

3 bit synchronous up counter

3 bit synchronous up counter

Public

project.name

sequence generator

sequence generator

Public

project.name

SR to D

SR to D

Public

project.name

Even Parity Checker

Even Parity Checker

Public

project.name

Deld 2 (a)

Deld 2 (a)

Public

project.name

Half Adder using NAND Gate

Half Adder using NAND Gate

Public

project.name

Half Adder using NOR Gate

Half Adder using NOR Gate

Public

project.name

HALF SUBTRACTOR USING NOR GATE

HALF SUBTRACTOR USING NOR GATE

Public

project.name

BCD to gray & gray to BCD

BCD to gray & gray to BCD

Public

project.name

Excess 3 to BCD

Excess 3 to BCD

Public

project.name

4bit comparator

4bit comparator

Public

project.name

sad

sad

Public

project.name

Decade counter

Decade counter

Public

project.name

Odd parity Checker

Odd parity Checker

Public

project.name

BCD to Excess 3

BCD to Excess 3

Public

project.name

Full subtrcator using NOR gate

Full subtrcator using NOR gate

Public

project.name

MOD 7

MOD 7

Public

project.name

JK to D

JK to D

Public

project.name

SR to JK

SR to JK

Public

project.name

Half subtractor

Half subtractor

Public

project.name

SR to D

SR to D

Public

project.name

seq gen even

seq gen even

Public

project.name

SR to T

SR to T

Public

project.name

MOD 13 SYNCHRONOUS COUNTER

MOD 13 SYNCHRONOUS COUNTER

Public

project.name

T to JK

T to JK

Public

project.name

SR T0 JK FLIP FLOP

SR T0 JK FLIP FLOP

Public

project.name

Full subtractor

Full subtractor

Public

project.name

SYNCHRONOUS 3 BIT UP/DOWN COUNTER

SYNCHRONOUS 3 BIT UP/DOWN COUNTER

Public

project.name

D to T

D to T

Public

project.name

Sequence gen (wrong)

Sequence gen (wrong)

Public

project.name

Odd parity Generator

Odd parity Generator

Public

project.name

SR Latch

SR Latch

Public

project.name

JK flip flop

JK flip flop

Public

project.name

HALF SUBTRACTOR USING NAND GATE

HALF SUBTRACTOR USING NAND GATE

Public

project.name

Full Adder using NOR Gate

Full Adder using NOR Gate

Public

project.name

Decade counter

Decade counter

Public

project.name

Full adder using NAND Gate

Full adder using NAND Gate

Public

project.name

Full Adder

Full Adder

Public

project.name

BCD ADDER

BCD ADDER

Public

project.name

2bit Comparator

2bit Comparator

Public

project.name

Even Parity Generator

Even Parity Generator

Public

project.name

Basic Gates

Basic Gates

Public

project.name

Binary to Excess 3

Binary to Excess 3

Public

project.name

Full Subtractor using NAND gate

Full Subtractor using NAND gate

Public

project.name

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