Logic gates, half- full adder, half & full subtractor and MUXs
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Author: Himani Singh

Project access type: Public

Description:

Assignment 1:

1) All logic gates with their truth tables

2) 1-bit half-adder

3) 1-bit full-adder using half-adder as module instance

4) 1-bit full-adder using gates alone

5) 1-bit half-subtractor

6) 1-bit full-subtractor using half subtractor

7) 1-bit full-subtractor using gates alone

8) 2 x 1 MUX

9) 4X1 MUX using 2X1 MUX  

10) 8X1 MUX using 2X1 MUX

Created: Nov 02, 2023

Updated: Nov 22, 2023


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