Member since: 1 year
Educational Institution: Self-learning
Country: Switzerland
Orologio
OrologioNew Clock
New ClockDaten-BUS (4 Bit)
Daten-BUS (4 Bit)Subcircuits
Subcircuits8-Bit Shift Register (SIPO)
8-Bit Shift Register (SIPO)4-Bit Out Register
4-Bit Out Register4-Bit Input Register
4-Bit Input Register4-Bit subcircuit decoder example
4-Bit subcircuit decoder exampleSplitter example
Splitter examplesignal controll
signal controllCounter binary
Counter binary8-Bit Out Shift Register
8-Bit Out Shift RegisterDisplay 7 segment, drive by Shift Register (SIPO)
Display 7 segment, drive by Shift Register (SIPO)LED
LEDFlip-Flop
Flip-FlopUntitled
UntitledUntitled
UntitledKeyboard
Keyboard28byj-48 rohs motro driver
28byj-48 rohs motro driverDisplay
DisplaySR Flip Flop to JK and D Flip Flop
SR Flip Flop to JK and D Flip Flopa look inside STRING2000C
a look inside STRING2000CED-2023_2-Lab1-Reto
ED-2023_2-Lab1-RetoRipple Carry Adder
Ripple Carry AdderFull Adder From 2 half Adders
Full Adder From 2 half AddersKeyboard
KeyboardFind 1011 sequence
Find 1011 sequencemod 16 ripple down counter
mod 16 ripple down counterSums and clocks
Sums and clockssimple plotter circuit
simple plotter circuitTema marti 26.04
Tema marti 26.04Tema25.04
Tema25.043.2.1 Asynch Counter
3.2.1 Asynch Counter3.1.2 Flip Flop
3.1.2 Flip Flopclock
clockTic tac toe Simulator
Tic tac toe SimulatorSAP - 1
SAP - 1Static RAM
Static RAMCPU Microprocessor
CPU Microprocessor256-Series
256-SeriesFemto-4v1.2 (Computer)
Femto-4v1.2 (Computer)Femto-4v2.6 (Computer)
Femto-4v2.6 (Computer)Femto-4v2.5 (Computer)
Femto-4v2.5 (Computer)Femto-4v2.5 (Computer)
Femto-4v2.5 (Computer)TicTacToe Machine
TicTacToe Machine7-Segment Display Controller
7-Segment Display ControllerEncoder, Decoder, and 7-Segment Controller
Encoder, Decoder, and 7-Segment ControllerTestProject001
TestProject001final circuit
final circuitEEPROM Interactive Programmer
EEPROM Interactive Programmer8 Bit CPU
8 Bit CPUMidterm project(Moving Display)
Midterm project(Moving Display)3.2.1 Asynchronous Counters
3.2.1 Asynchronous CountersLAB 05
LAB 0512bits calcu finale
12bits calcu finaleDivision 24 bits
Division 24 bits4-bit Adder num
4-bit Adder num6-bits Divider
6-bits DividerAfficher 8 bit
Afficher 8 bitTwos complement
Twos complementDecimal to BCD
Decimal to BCD12-bit calculator
12-bit calculatorAdders
Adders12-bit calculator sans div
12-bit calculator sans div12-bit calculator
12-bit calculatorJK Flip flop
JK Flip flopPASSWORD
PASSWORDdigital
digitalDEC hw7
DEC hw77 Segment Decoder
7 Segment DecoderBCD LUT
BCD LUTModular FPGA with LUT and bus
Modular FPGA with LUT and busXOR gate by using NOR gate
XOR gate by using NOR gateSR,JK,T,F FLIP FLOP Using NAND and NOR Gate
SR,JK,T,F FLIP FLOP Using NAND and NOR GateCronometro
CronometroALU
ALUAsynchronous 16 - Segment Array
Asynchronous 16 - Segment ArrayXOR Gate
XOR Gate8 Bit ALU / Memory Main
8 Bit ALU / Memory Main60 second timer
60 second timerAccumulator Project
Accumulator Project74HC595
74HC595Magnitude Comparator
Magnitude Comparator2 bit comparator using basic gates
2 bit comparator using basic gatesBinary Comparator [4-bit]
Binary Comparator [4-bit]Play Roulette / Programmable Computer
Play Roulette / Programmable ComputerBasic GPU
Basic GPU32-Bits RAM v0.1.50
32-Bits RAM v0.1.50