ENG103 Lab Expt 4 SINGAPORE UNIVERISTY OF SOCIAL SCIENCES (SUSS) Page 3 of 42.Screen captures the timing diagram for the clock and output Q signals below.3.Deduce the function of the circuit.This is a frequency divide by 2 circuit whereby the output frequency is half of the input frequency.Part B: JK flip-flopUsing the online simulator, apply a clock signal to the JK flip-flops. Probe the clock and Q timing signals.4.Examine the Q output for different inputs of J and K. Fill in the table below and sketch the state transition diagram.InputOutputJKQ00Q(t) – no change01010111Q’(t) – toggles5.Determine the inputs of J and K that produces output Q that is half the frequency of the input clock pulse. Screen captures the circuit, the clock and Q signals, and show it below.