Searched Projects

It is a 3-bit binary multiplier circuit.

In this circuit, I designed the "Half Adder" and "Full Adder" modules with NAND gates.

Hope you'd like it. :)

Mini Design Project created for Prof. Choi's computer engineering class at mst.

A Half Adder is a simple combinational circuit used to add two single-bit binary numbers. It has two inputs, A and B, and produces two outputs: Sum (S) and Carry (C). The Sum is the result of the binary addition, while the Carry is generated when both inputs are 1. The circuit is built using basic logic gates—an AND gate and an OR-NOT combination. The Sum is obtained by first using an OR gate to check if at least one input is 1, followed by a NOT gate to invert the Carry when both inputs are 1. The Carry is generated using an AND gate, which outputs 1 only when both A and B are 1. The working of the Half Adder can be understood using the following truth table:

The Half Adder is useful for basic binary addition but cannot handle a carry from a previous stage, which limits its use in multi-bit addition. To overcome this, a Full Adder is used, which considers an additional carry-in input.

4 x 1 Multiplexer Logical Diagram In Digital Logic Circuits