project.name

Bidisha Nag

Member since: 3 years

Educational Institution: Not Entered

Country: Not Entered

JK FLIP FLOP

JK FLIP FLOP
Public
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4-BIT BCD ADDER

4-BIT BCD ADDER
Public
project.name

HALF ADDER - HALF SUBTRACTOR

HALF ADDER - HALF SUBTRACTOR
Public
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FULL ADDER-FULL SUBTRACTOR

FULL ADDER-FULL SUBTRACTOR
Public
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LOGIC GATES

LOGIC GATES
Public
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FULL SUBTRACTOR-HALF SUBTRACTOR

FULL SUBTRACTOR-HALF SUBTRACTOR
Public
project.name

FULL ADDER-HALF ADDER

FULL ADDER-HALF ADDER
Public
project.name

RIPPLE CARRY ADDER

RIPPLE CARRY ADDER
Public
project.name

ANALOG CIRCUITS

ANALOG CIRCUITS
Public
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8:1 MUX USING TWO 4:1 MUXs (12100120040)

8:1 MUX USING TWO 4:1 MUXs (12100120040)
Public
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4-BIT ADDER SUBTRACTOR COMPOSITE UNIT

4-BIT ADDER SUBTRACTOR COMPOSITE UNIT
Public
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LOGICAL UNIT WHICH WILL PERFORM 4 OPERATIONS AND,OR,NOT,XOR

LOGICAL UNIT WHICH WILL PERFORM 4 OPERATIONS AND,OR,NOT,XOR
Public
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DESIGN AND SIMULATE A 4-BIT ARITHMETIC UNIT

DESIGN AND SIMULATE A 4-BIT ARITHMETIC UNIT
Public
project.name
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