project.name

Vanshika Singh

Member since: 2 years

Educational Institution: Ajay Kumar Garg Engineering College ,Ghaziabad

Country: India

expof8bit

expof8bit
Public
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registertobusviceversa

registertobusviceversa
Public
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carrylookaheadadder

carrylookaheadadder
Public
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SAP - 1

SAP - 1
Public
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n bit counter

n bit counter
Public
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binary to gray 4 bit

binary to gray 4 bit
Public
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4*1 multiplexers

4*1 multiplexers
Public
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8:1 Mux using Logic Gates

8:1 Mux using Logic Gates
Public
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n bit counter

n bit counter
Public
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8 bit ALU

8 bit ALU
Public
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binary to gray 8 bit

binary to gray 8 bit
Public
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gray to binary 8 bit

gray to binary 8 bit
Public
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Untitled

Untitled
Public
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4x1 Multiplexer

4x1 Multiplexer
Public
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full adder using two half adder

full adder using two half adder
Public
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Half adder

Half adder
Public
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Full adder

Full adder
Public
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3:8 Decoder

3:8 Decoder
Public
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half adder

half adder
Public
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Half adder

Half adder
Public
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full adder using two half adder

full adder using two half adder
Public
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No result image
Vanshika Singh is not a collaborator of any project.