project.name

Yuvika Singh

Member since: 2 years

Educational Institution: Not Entered

Country: Not Entered

Untitled

Untitled
Public
project.name

carry look ahead adder

carry look ahead adder
Public
project.name

8:1 Mux using Logic Gates

8:1 Mux using Logic Gates
Public
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8:1 Mux using Logic Gates

8:1 Mux using Logic Gates
Public
project.name

8:1 Mux using Logic Gates

8:1 Mux using Logic Gates
Public
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8 bit input output

8 bit input output
Public
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8*1 Multiplexer

8*1 Multiplexer
Public
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8 bit ALU

8 bit ALU
Public
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4*1 multiplexers

4*1 multiplexers
Public
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gray to binary 8 bit

gray to binary 8 bit
Public
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gray to binary 8 bit

gray to binary 8 bit
Public
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SR flip flop

SR flip flop
Public
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binary to gray 8 bit

binary to gray 8 bit
Public
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D flip flop

D flip flop
Public
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JK flip flop

JK flip flop
Public
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4 bit mux

4 bit mux
Public
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half adder

half adder
Public
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full adder

full adder
Public
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Untitled

Untitled
Public
project.name
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