project.name

Sarthak Gupta

Member since: 3 years

Educational Institution: KIET group of Institutions

Country: India

1*8 demultiplexer

1*8 demultiplexer
Public
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3 Bit Multiplier

3 Bit Multiplier
Public
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FULL SUB BY SG

FULL SUB BY SG
Public
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Exp 6B - 3 Bit Binary Multiplier

Exp 6B - 3 Bit Binary Multiplier
Public
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HALF HEADER AND HALF SUBTRACT

HALF HEADER AND HALF SUBTRACT
Public
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DeMux 1:4

DeMux 1:4
Public
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FULLY SUB BY SG

FULLY SUB BY SG
Public
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FULLY ADDITION

FULLY ADDITION
Public
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FULL SUB BY SG

FULL SUB BY SG
Public
project.name

1*4 multiplexer

1*4 multiplexer
Public
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Exp 6B - 3 Bit Binary Multiplier

Exp 6B - 3 Bit Binary Multiplier
Public
project.name

2 bit ALU

2 bit ALU
Public
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FULL SUB BY SG

FULL SUB BY SG
Public
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1:4 Demultiplexer using logic gates

1:4 Demultiplexer using logic gates
Public
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Design a 2-bit Arithmetic Logic Unit

Design a 2-bit Arithmetic Logic Unit
Public
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HALF HEADER AND HALF SUBTRACT

HALF HEADER AND HALF SUBTRACT
Public
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3 bits carry look ahead adder

3 bits carry look ahead adder
Public
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FULLY ADDITION

FULLY ADDITION
Public
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Untitled

Untitled
Public
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3 Bit Multiplier Circuit

3 Bit Multiplier Circuit
Public
project.name
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