project.name

Shashank Gaur

Member since: 3 years

Educational Institution: Not Entered

Country: Not Entered

8 bit register

8 bit register
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Data Path

Data Path
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8 Bit ALU

8 Bit ALU
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D Flip Flop

D Flip Flop
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Gray To Binary

Gray To Binary
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Gates Testing

Gates Testing
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half adder

half adder
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full adder sum

full adder sum
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full adder full

full adder full
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4:1 Mux

4:1 Mux
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8:1 mux

8:1 mux
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4:1 Mux using Gates (Sample)

4:1 Mux using Gates (Sample)
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4 Bit binary Ripple factor

4 Bit binary Ripple factor
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T Flip Flop

T Flip Flop
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3:8 Decoder

3:8 Decoder
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SR Flip Flop

SR Flip Flop
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4 Bit Carry Look ahead adder

4 Bit Carry Look ahead adder
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Alu (1 bit)

Alu (1 bit)
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Binary To Gray

Binary To Gray
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Shashank Gaur is not a collaborator of any project.

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