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SR Fliop Flop
SR Fliop Flopmain
mainUntitled
Untitled4 Bit Carry Look ahead adder
4 Bit Carry Look ahead adder4 Bit Ripple Counter
4 Bit Ripple Counterbinary to gray
binary to gray3 TO 8 LINE DECODER
3 TO 8 LINE DECODER4*1 multiplexers
4*1 multiplexers8:1 Mux using Logic Gates
8:1 Mux using Logic Gates8 bit input output
8 bit input outputbinary to gray 8 bit
binary to gray 8 bitgray to binary 8 bit
gray to binary 8 bitD flip flop
D flip flopT flip flop
T flip flop8 bit ALU
8 bit ALU4 Bit Carry Look Ahead Adder
4 Bit Carry Look Ahead Adder16 Bit Counter
16 Bit CounterGray to Binary
Gray to BinaryHalf Adder
Half AdderUntitled
Untitled4 X 1 MUX
4 X 1 MUX8 X 1 MUX
8 X 1 MUXSR flip flop
SR flip flopJK flip flop
JK flip flopBinary to Gray
Binary to GrayData Path
Data PathExp No. 7 : Design the data path of computer from its register transfer language description
Exp No. 7 : Design the data path of computer from its register transfer language descriptionFull adder using basic gates
Full adder using basic gatesHALF ADDER
HALF ADDER