project.name

Hirnaymay Bhaskar

Member since: 3 years

Educational Institution: Ajay Kumar Garg Engineering College

Country: India

Experiment - 6: ALU

Experiment - 6: ALU
Public
project.name
Fork View More

Experiment - 7: Data Path

Experiment - 7: Data Path
Public
project.name
Fork View More

counter

counter
Public
project.name
Fork View More

Experiment 4 + 5: Flip Flop/ 8bits I/O

Experiment 4 + 5: Flip Flop/ 8bits I/O
Public
project.name
Fork View More

Full Adder with Half Adder

Full Adder with Half Adder
Public
project.name
Fork View More

Experiment - 0: Basic Gates

Experiment - 0: Basic Gates
Public
project.name
Fork View More

Carry Look Ahead Adder

Carry Look Ahead Adder
Public
project.name
Fork View More

Experiment - 1: Full Adder with basic Gates

Experiment - 1: Full Adder with basic Gates
Public
project.name
Fork View More

Experiment - 3: Decoder and Multiplexer

Experiment - 3: Decoder and Multiplexer
Public
project.name
Fork View More

Experiment - 2: Gray to Binary Converter

Experiment - 2: Gray to Binary Converter
Public
project.name
Fork View More
No result image
Hirnaymay Bhaskar is not a collaborator of any project.

Follow us on:

Facebook Logo Twitter Logo Linkedin Logo Youtube Logo Github Logo
Simulator
Learn
Blog
Examples
Log in
Documentation
Contribute
Teachers
About
Api
FAQ
Incubated From:

Copyright © 2024 CircuitVerse, All rights reserved.