Mohd ZAID KHAN - Circuits

Mohd ZAID KHAN

Member since: 2 years

Educational Institution: Ajay Kumar Garg Engineering College

Country: India

register to bus

register to bus

Public

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CLG

CLG

Public

project.name

Experiment - 7: Data Path

Experiment - 7: Data Path

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Counter

Counter

Public

project.name

binary to gray and gray to binary

binary to gray and gray to binary

Public

project.name

Practical 4

Practical 4

Public

project.name

Untitled

Untitled

Public

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half adder

half adder

Public

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Multiplexer

Multiplexer

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Multiplexe

Multiplexe

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Multiplexer

Multiplexer

Public

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Multiplexer

Multiplexer

Public

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Multiplexer

Multiplexer

Public

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Multiplexer

Multiplexer

Public

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Multiplexer

Multiplexer

Public

project.name

4+5. Flip flop and 8 bit I/O

4+5. Flip flop and 8 bit I/O

Public

project.name

half adder

half adder

Public

project.name

Practical 4

Practical 4

Public

project.name

and or not xor nand nor from basdic 3 gates

and or not xor nand nor from basdic 3 gates

Public

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Practical 4

Practical 4

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Practical-6

Practical-6

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Multiplexer

Multiplexer

Public

project.name

Practical-7

Practical-7

Public

project.name

Practical 4

Practical 4

Public

project.name

Splitter

Splitter

Public

project.name

and or not xor nand nor from basdic 3 gates

and or not xor nand nor from basdic 3 gates

Public

project.name

Mohd ZAID KHAN is not a collaborator of any project.