Sayanabha
Member since: 3 years
Educational Institution: Not Entered
Country: Not Entered
2-1 Multiplexer
2-1 Multiplexer
Public
sipo
sipo
Public
4:1 MUX
4:1 MUX
Public
4-Bit Synchronous Down Counter
4-Bit Synchronous Down Counter
Public
Untitled
Untitled
Public
Asynchronous Counter
Asynchronous Counter
Public
Flip-Flops using NAND Gate
Flip-Flops using NAND Gate
Public
D flip-flop using NAND gates
D flip-flop using NAND gates
Public
Experiment 14 - 2 bit comparator
Experiment 14 - 2 bit comparator
Public
encoder
encoder
Public
Flip-Flops using NAND Gate
Flip-Flops using NAND Gate
Public
Untitled
Untitled
Public
FULL ADDER BY USING TWO HALF ADDERS
FULL ADDER BY USING TWO HALF ADDERS
Public
D - Flip-Flop
D - Flip-Flop
Public
4:1 Mux using Logic Gates
4:1 Mux using Logic Gates
Public
Even Parity Checker
Even Parity Checker
Public
Synchronous Up Counter 4 bit
Synchronous Up Counter 4 bit
Public
Disadvantage for Encoder CKT
Disadvantage for Encoder CKT
Public
4:1 MUX
4:1 MUX
Public
4 bit Synchronous DOWN Counter
4 bit Synchronous DOWN Counter
Public
3:8 Decoder
3:8 Decoder
Public
full adder using two half adder circuit
full adder using two half adder circuit
Public
4-Bit Synchronous Up Counter
4-Bit Synchronous Up Counter
Public
SR Flip Flop
SR Flip Flop
Public
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