3 x 8 Decoder

3:8 Decoder

4: 1 MUX

Design and Simulate AND , OR , XOR and NAND gates

Untitled

multiplexer

RIPPLE CARRY ADDER

4 BIT BCD ADDER

INCREMENT using FA and HA

RIPPLE CARRY ADDER

Logical Unit

FA using HA

4bit increment and Decrement

FS using HS

2:4 Decoder

Decrement using HS and FS

HALF ADDER ,HALF SUBTRACTER

DESIGN AND SIMULATE A 4-BIT BCD ADDER

INCREMENT using FA and HA

logic gates

4 bit Arithmetic UNIT

INCREMENT using FA and HA

logic gates

HALF ADDER ,HALF SUBTRACTER

INCREMENT using FA and HA

Decrement using HS and FS