project.name

JAYA DEY

Member since: 3 years

Educational Institution: Not Entered

Country: India

ANALOG

ANALOG
Public
project.name

Adder Subtractor Composite Unit

Adder Subtractor Composite Unit
Public
project.name

4:1 MUX using 2:1 MUX [exp 8]

4:1 MUX using 2:1 MUX [exp 8]
Public
project.name

FULL ADDER AND SUBTRACTOR (EXP 3)

FULL ADDER AND SUBTRACTOR (EXP 3)
Public
project.name

HALF ADDER AND SUBTRACTOR [EXP 2]

HALF ADDER AND SUBTRACTOR [EXP 2]
Public
project.name

FS USING HS [EXP 4]

FS USING HS [EXP 4]
Public
project.name

Ripple carry adder EXP 5

Ripple carry adder EXP 5
Public
project.name

Increment And Decrement Circuit [EXP 6]

Increment And Decrement Circuit [EXP 6]
Public
project.name

FA USING HA [EXP 4]

FA USING HA [EXP 4]
Public
project.name

EXPERIMENT 10 - DESIGN AND SIMULATE A 4-BIT ARITHMETIC UNIT

EXPERIMENT 10 - DESIGN AND SIMULATE A 4-BIT ARITHMETIC UNIT
Public
project.name

3:8 Decoder

3:8 Decoder
Public
project.name

EXPERIMENT 9 - DESIGN A LOGICAL UNIT WHICH WILL PERFORM 4 OPERATIONS AND,OR,NOT,XOR

EXPERIMENT 9 - DESIGN A LOGICAL UNIT WHICH WILL PERFORM 4 OPERATIONS AND,OR,NOT,XOR
Public
project.name

LOGIC GATES [EXP 1]

LOGIC GATES [EXP 1]
Public
project.name
No result image
JAYA DEY doesn't have any favourites.
No result image
JAYA DEY is not a collaborator of any project.