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Anshaj Ahuja

Member since: 3 years

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PISO SHIFT REGISTER

PISO SHIFT REGISTER
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NAND gates

NAND gates
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DCF lab 2

DCF lab 2
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SISO

SISO
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SIPO

SIPO
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PIPO

PIPO
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basic gates

basic gates
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basic gates

basic gates
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CIRCUIT 1 Gray

CIRCUIT 1 Gray
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PISO

PISO
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NOR gate

NOR gate
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5 bit asynchronous counter

5 bit asynchronous counter
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SIPO using D Flip Flop

SIPO using D Flip Flop
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Anshaj Ahuja is not a collaborator of any project.

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