project.name

swarnava bose

Member since: 3 years

Educational Institution: Not Entered

Country: Not Entered

ab+cd using nor

ab+cd using nor
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Parity bit checker and generator

Parity bit checker and generator
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full adder

full adder
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7 Segment display

7 Segment display
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Untitled

Untitled
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full adder using 3-8 decoder circuit

full adder using 3-8 decoder circuit
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full adder using decoder3:8

full adder using decoder3:8
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SR flipflop using nand and nor

SR flipflop using nand and nor
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jk flipflop

jk flipflop
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JK FLIP FLOP SEQUENTIAL ELEMENT

JK FLIP FLOP SEQUENTIAL ELEMENT
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ab+cd using nor

ab+cd using nor
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multiplexer12

multiplexer12
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