SANTHOSH Y : CSE DEPT - Circuits

SANTHOSH Y : CSE DEPT

Member since: 2 years

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EXP-1(logic gates)

EXP-1(logic gates)

Public

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EXP-2(Logical Gate)

EXP-2(Logical Gate)

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project.name

Verification of logic gate

Verification of logic gate

Public

project.name

Untitled

Untitled

Public

project.name

Logic Gate Verification

Logic Gate Verification

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project.name

Logic Gate Verification

Logic Gate Verification

Public

project.name

Exp-3

Exp-3

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project.name

EXP-3(ADDER-(FULL/HALF))

EXP-3(ADDER-(FULL/HALF))

Public

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