Dr1yal
Member since: 3 years
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Common Bus System using 4X1 multiplexers
Common Bus System using 4X1 multiplexers
self work
self work
Verification of Truth Table of NAND gate
Verification of Truth Table of NAND gate
Full adder using logic gates
Full adder using logic gates
Full Adder using NAND Gate
Full Adder using NAND Gate
4 bit adder and subtractor using full adder made with logic gates
4 bit adder and subtractor using full adder made with logic gates
Verification of Truth Table of NOT gate
Verification of Truth Table of NOT gate
Verification of Truth table of OR gate
Verification of Truth table of OR gate
Open ended ALU
Open ended ALU
Common bus using tri state buffer
Common bus using tri state buffer
4-bit BCD Adder
4-bit BCD Adder
logical part of ALU
logical part of ALU
complete ALU lab 9
complete ALU lab 9
Half bit adder using nand gate
Half bit adder using nand gate
8x1 mux adder
8x1 mux adder
4 bit bcd adder
4 bit bcd adder
self work
self work
half adder using half subtractor
half adder using half subtractor
LAB-3
LAB-3
Common bus using 4X1 mux
Common bus using 4X1 mux
LAB-7
LAB-7
Verification of NOR gate
Verification of NOR gate
Full Adder using two half adders
Full Adder using two half adders
Half Bit Adder
Half Bit Adder
4 bit full adder using adder
4 bit full adder using adder
Lab 8
Lab 8
AND gate using NAND gate
AND gate using NAND gate
ALU using 4x1 MUX and 2x4 Decoder
ALU using 4x1 MUX and 2x4 Decoder
full adder using full subtractor
full adder using full subtractor
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BCD (LAB-5)
BCD (LAB-5)
