project.name

RAKSHIT WALIA

Member since: 3 years

Educational Institution: Not Entered

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FULL ADDER using logic gates

FULL ADDER using logic gates
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Common Bus using tri state buffers

Common Bus using tri state buffers
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Arithematic part of ALU

Arithematic part of ALU
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Verification of Gates

Verification of Gates
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2ND part OF Experiment

2ND part OF Experiment
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Half adder circuits

Half adder circuits
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Verification of gates

Verification of gates
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4 bit BCD adder

4 bit BCD adder
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All gates using Nand gate

All gates using Nand gate
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full ALU

full ALU
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Reference for ALU

Reference for ALU
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Self work

Self work
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4-Bit Binary _adder and substractor

4-Bit Binary _adder and substractor
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FULL ADDER

FULL ADDER
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Common Bus System using 4X1 multiplexers

Common Bus System using 4X1 multiplexers
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