project.name

DEVAPATLA THARUN KUMAR REDDY CSEUG-2020

Member since: 3 years

Educational Institution: Kalasalingam Academy Of Research and Education

Country: India

implimentation of logic gates

implimentation of logic gates
Public
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gray to binary and binary to gray

gray to binary and binary to gray
Public
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flip flop

flip flop
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adders

adders
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shift register

shift register
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parity checkers

parity checkers
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coders

coders
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parity generators

parity generators
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multi and de multi plexers

multi and de multi plexers
Public
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DEVAPATLA THARUN KUMAR REDDY CSEUG-2020 is not a collaborator of any project.