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Soumi Roy

Member since: 3 years

Educational Institution: UNIVERSITY OF ENGINEERING AND MANAGEMENT,KOLKATA

Country: India

SHIFT RESISTER

SHIFT RESISTER
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SERIAL IN PARALLEL OUT SHIFT REGISTOR

SERIAL IN PARALLEL OUT SHIFT REGISTOR
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EVEN PARITY CHECKER

EVEN PARITY CHECKER
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REPRESENTATION OF D-FLIPFLOP USING NAMD GATE

REPRESENTATION OF D-FLIPFLOP USING NAMD GATE
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Binary to Gray

Binary to Gray
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Gray to Binary

Gray to Binary
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EXcess-3 to BCD

EXcess-3 to BCD
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Half Adder

Half Adder
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FULL ADDER

FULL ADDER
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EXPERIMENT 1A

EXPERIMENT 1A
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EXPERIMENT 2

EXPERIMENT 2
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EXPERIMENT 1B

EXPERIMENT 1B
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EXPERIMENT 3

EXPERIMENT 3
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EXPERIMENT 4

EXPERIMENT 4
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EXPERIMENT 6

EXPERIMENT 6
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EXPERIMENT 7

EXPERIMENT 7
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EXPERIMENT 5

EXPERIMENT 5
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EXPERIMENT 8

EXPERIMENT 8
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EXPERIMENT 9

EXPERIMENT 9
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EXPERIMENT 10

EXPERIMENT 10
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EXPERIMENT 11

EXPERIMENT 11
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EXPERIMENT 12

EXPERIMENT 12
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EXPERIMENT 13

EXPERIMENT 13
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EXPERIMENT 14

EXPERIMENT 14
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EXPERIMENT 15A

EXPERIMENT 15A
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EXPERIMENT 15B

EXPERIMENT 15B
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EXPERIMENT 18

EXPERIMENT 18
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EXPERIMENT 20

EXPERIMENT 20
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EXPERIMENT 19

EXPERIMENT 19
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EXPERIMENT 22

EXPERIMENT 22
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EXPERIMENT 23

EXPERIMENT 23
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Flip-Flops using NAND Gate

Flip-Flops using NAND Gate
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EXPERIMENT 24

EXPERIMENT 24
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EXPERIMENT 21

EXPERIMENT 21
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EXPERIMENT 17

EXPERIMENT 17
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EXPERIMENT 17

EXPERIMENT 17
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BCD to Excess-3 Conversion

BCD to Excess-3 Conversion
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EXPERIMENT 6

EXPERIMENT 6
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Sequential circuit that is able to overcome the race around condition.

Sequential circuit that is able to overcome the race around condition.
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FULL ADDER using two HALF ADDERS and and OR gate

FULL ADDER using two HALF ADDERS and and OR gate
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BCD TO DECIMAL CONVERSION(ANALOG EXP-9)

BCD TO DECIMAL CONVERSION(ANALOG EXP-9)
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