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Niharika Samanta

Member since: 3 years

Educational Institution: Not Entered

Country: Not Entered

Experiment 8

Experiment 8
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Experiment 10

Experiment 10
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full subtractor using half subtractor

full subtractor using half subtractor
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basic gate 3

basic gate 3
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XOR using NOR

XOR using NOR
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exp 2

exp 2
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exp 3

exp 3
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and operation

and operation
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and operation

and operation
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or operation

or operation
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Untitled

Untitled
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XOR using NOR

XOR using NOR
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or operation

or operation
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Untitled

Untitled
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exp 2

exp 2
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exp 3

exp 3
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EXP 1 B

EXP 1 B
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Experiment 9

Experiment 9
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Experiment 4

Experiment 4
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@-bit comparator

@-bit comparator
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MULTIPLEXER

MULTIPLEXER
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DEMULTIPLEXER

DEMULTIPLEXER
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experiment 6

experiment 6
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even parity

even parity
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PRIORITY ENCODER

PRIORITY ENCODER
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octal to binary

octal to binary
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d flip flop nand gate

d flip flop nand gate
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d flip flop nand gate

d flip flop nand gate
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jk flip flop nand gate

jk flip flop nand gate
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t flip flop nand gate

t flip flop nand gate
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experiment 6

experiment 6
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Niharika Samanta is not a collaborator of any project.

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