project.name

Arindam Ghosh

Member since: 3 years

Educational Institution: University of engineering and management

Country: India

1:4 De-MUX

1:4 De-MUX
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4:2 Priority Encoder

4:2 Priority Encoder
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Full Adder Using Two Half Adder and an OR Gate

Full Adder Using Two Half Adder and an OR Gate
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Implementation of Full Adder Using MUX IC 4539B.

Implementation of Full Adder Using MUX IC 4539B.
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NAND gates as AND gate

NAND gates as AND gate
Public
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4 bit Gray code to 4 bit Binary

4 bit Gray code to 4 bit Binary
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BCD to decimal

BCD to decimal
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Octal to binary using basic Gate

Octal to binary using basic Gate
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3-8 De-Coder

3-8 De-Coder
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Trial befre 1st ex

Trial befre 1st ex
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NAND gates as NOT gate

NAND gates as NOT gate
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Untitled

Untitled
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XOR with NAND

XOR with NAND
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EXP-2

EXP-2
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A.B’ + A’B’ + B’C

A.B’ + A’B’ + B’C
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Half-Subtractor

Half-Subtractor
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Even Parity

Even Parity
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MUX 4:1

MUX 4:1
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1:4 De-MUX

1:4 De-MUX
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NOR gates as AND gate

NOR gates as AND gate
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NOR gates as X-OR gate

NOR gates as X-OR gate
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Full Subtractor

Full Subtractor
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NAND gates as X-OR gate

NAND gates as X-OR gate
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Full Subtractor

Full Subtractor
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NOR gates as OR gate

NOR gates as OR gate
Public
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BCD to decimal

BCD to decimal
Public
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Implementation of Full Subtractor using MUX

Implementation of Full Subtractor using MUX
Public
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NAND gates as OR gate

NAND gates as OR gate
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A’ + A.B + B’

A’ + A.B + B’
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Flipflop

Flipflop
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Prime and Non-Prime numbers (4-bit) Display

Prime and Non-Prime numbers (4-bit) Display
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4 bit Binary code to 4 bit Gray code.

4 bit Binary code to 4 bit Gray code.
Public
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Excess -3 code to BCD.

Excess -3 code to BCD.
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Adder

Adder
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full subtractor using two half subtractor and an Or gate

full subtractor using two half subtractor and an Or gate
Public
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NAND gates as AND gate

NAND gates as AND gate
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A + B.C

A + B.C
Public
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2 bit magnitude Comparator

2 bit magnitude Comparator
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4-bit Odd and Even indicator

4-bit Odd and Even indicator
Public
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BCD to Excess -3 code

BCD to Excess -3 code
Public
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