Member since: 3 years
Educational Institution: University of engineering and management
Country: India
1:4 De-MUX
1:4 De-MUX4:2 Priority Encoder
4:2 Priority EncoderFull Adder Using Two Half Adder and an OR Gate
Full Adder Using Two Half Adder and an OR GateImplementation of Full Adder Using MUX IC 4539B.
Implementation of Full Adder Using MUX IC 4539B.NAND gates as AND gate
NAND gates as AND gate4 bit Gray code to 4 bit Binary
4 bit Gray code to 4 bit BinaryBCD to decimal
BCD to decimalOctal to binary using basic Gate
Octal to binary using basic Gate3-8 De-Coder
3-8 De-CoderTrial befre 1st ex
Trial befre 1st exNAND gates as NOT gate
NAND gates as NOT gateUntitled
UntitledXOR with NAND
XOR with NANDEXP-2
EXP-2A.B’ + A’B’ + B’C
A.B’ + A’B’ + B’CHalf-Subtractor
Half-SubtractorEven Parity
Even ParityMUX 4:1
MUX 4:11:4 De-MUX
1:4 De-MUXNOR gates as AND gate
NOR gates as AND gateNOR gates as X-OR gate
NOR gates as X-OR gateFull Subtractor
Full SubtractorNAND gates as X-OR gate
NAND gates as X-OR gateFull Subtractor
Full SubtractorNOR gates as OR gate
NOR gates as OR gateBCD to decimal
BCD to decimalImplementation of Full Subtractor using MUX
Implementation of Full Subtractor using MUXNAND gates as OR gate
NAND gates as OR gateA’ + A.B + B’
A’ + A.B + B’Flipflop
FlipflopPrime and Non-Prime numbers (4-bit) Display
Prime and Non-Prime numbers (4-bit) Display4 bit Binary code to 4 bit Gray code.
4 bit Binary code to 4 bit Gray code.Excess -3 code to BCD.
Excess -3 code to BCD.Adder
Adderfull subtractor using two half subtractor and an Or gate
full subtractor using two half subtractor and an Or gateNAND gates as AND gate
NAND gates as AND gateA + B.C
A + B.C2 bit magnitude Comparator
2 bit magnitude Comparator4-bit Odd and Even indicator
4-bit Odd and Even indicatorBCD to Excess -3 code
BCD to Excess -3 code