Member since: 3 years
Educational Institution: University of Engineering & Management
Country: India
SUBTRACTOR CIRCUIT
SUBTRACTOR CIRCUITExperiment 5 : Gray Code to Binary
Experiment 5 : Gray Code to BinaryBCD to decimal
BCD to decimalBidirectional Shift Register
Bidirectional Shift Register2 bit magnitude Comparator
2 bit magnitude ComparatorBCD to Excess-3 code
BCD to Excess-3 codeHalf Subtractor Circuit
Half Subtractor CircuitImplementation of Half Adder
Implementation of Half AdderImplementation of Full Adder
Implementation of Full AdderFULL ADDER WITH BASIC GATES
FULL ADDER WITH BASIC GATESHalf Subtractor
Half SubtractorFull Subtractor using Half Subtractors
Full Subtractor using Half SubtractorsEXPERIMENT 10 11 12
EXPERIMENT 10 11 12EX 1B Q3
EX 1B Q3XOR with NAND
XOR with NANDXOR with NOR
XOR with NORDetermination of Prime or non prime
Determination of Prime or non primeEX 1B Q2
EX 1B Q2OR using NAND
OR using NANDAND USING NOR
AND USING NOREX 1B Q1
EX 1B Q1NOT Using NOR
NOT Using NORAND USING NAND
AND USING NANDOR USING NOR
OR USING NORGray Code from Binary Code
Gray Code from Binary CodeExcess -3 code to BCD.
Excess -3 code to BCD.EVEN PARITY CHECKER
EVEN PARITY CHECKER4:2 PRIORITY ENCODER
4:2 PRIORITY ENCODER4:2 p encoder
4:2 p encoderexp 19
exp 19EXP:14
EXP:14EXP:15(B)
EXP:15(B)BCD to decimal
BCD to decimalBCD to Decimal - 9th
BCD to Decimal - 9thT Flip Flop
T Flip FlopFlip-Flops using NAND Gate
Flip-Flops using NAND Gate2 bit magnitude Comparator
2 bit magnitude ComparatorImplementation of FULL Adder by using 2 half Adders and an OR gate
Implementation of FULL Adder by using 2 half Adders and an OR gateEXP 2 ODD AND EVEN NUMBER
EXP 2 ODD AND EVEN NUMBERHalf adder using basic gates
Half adder using basic gatesEven Parity Generator
Even Parity GeneratorFULL SUBTRACTOR CIRCUIT
FULL SUBTRACTOR CIRCUITEXP: 15(A)
EXP: 15(A)Bidirectional Shift Register
Bidirectional Shift Register