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Sanidhya Varshney

Member since: 3 years

Educational Institution: Not Entered

Country: Not Entered

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MULTIPLEXER

MULTIPLEXER
Public
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DEMULTIPLEXER

DEMULTIPLEXER
Public
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SHIFT REGISTER

SHIFT REGISTER
Public
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LOGIC GATE USING NAND GATE

LOGIC GATE USING NAND GATE
Public
project.name

half adder

half adder
Public
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full adder

full adder
Public
project.name

D flip flop

D flip flop
Public
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T flip flop

T flip flop
Public
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JK flip flop

JK flip flop
Public
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SR flip flop

SR flip flop
Public
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4 bit adder subtractor

4 bit adder subtractor
Public
project.name

4 bit binary adder

4 bit binary adder
Public
project.name