Member since: 3 years
Educational Institution: Not Entered
Country: India
DESIGN OF ADDER AND SUBTRACTOR
DESIGN OF ADDER AND SUBTRACTORDESIGN OF FLIP FLOPS
DESIGN OF FLIP FLOPSODD/EVEN PARITY CHECKER
ODD/EVEN PARITY CHECKERVERIFICATION OF BOOLEAN THEOREMS
VERIFICATION OF BOOLEAN THEOREMSDESIGN AND IMPLEMENTATION OF MAGNITUDE COMPARATOR
DESIGN AND IMPLEMENTATION OF MAGNITUDE COMPARATORSYNCHRONOUS COUNTER
SYNCHRONOUS COUNTERSTUDY OF LOGIC GATES
STUDY OF LOGIC GATESEXP-10 ENCODER AND DECODER
EXP-10 ENCODER AND DECODER2 bit sync.counter
2 bit sync.counterDESIGN AND IMPLEMENTATION OF SHIFT REGISTERS
DESIGN AND IMPLEMENTATION OF SHIFT REGISTERSDESIGN AND IMPLEMENTATION OF MULTIPLEXER AND DEMULTIPLEXER
DESIGN AND IMPLEMENTATION OF MULTIPLEXER AND DEMULTIPLEXERDESIGN AND IMPLEMENTATION OF CODE CONVERTERS
DESIGN AND IMPLEMENTATION OF CODE CONVERTERS