Member since: 3 years
Educational Institution: Techno India University
Country: India
Exp 8B : Even/Odd Parity Generator Circuit
Exp 8B : Even/Odd Parity Generator CircuitExp 5 : Half Adder and Full Adder Circuit
Exp 5 : Half Adder and Full Adder CircuitExp 7A : 4x1 Multiplexer Circuit
Exp 7A : 4x1 Multiplexer CircuitMOD-12 Ripple Up Counter
MOD-12 Ripple Up CounterTic tac toe Simulator
Tic tac toe SimulatorExp 7B: 3-to-8 Decoder Circuit
Exp 7B: 3-to-8 Decoder Circuit8 X 1 MULTIPLEXER
8 X 1 MULTIPLEXERFull Subtractor using 3x8 Decoder
Full Subtractor using 3x8 DecoderExp 9B : Realization of JK Flip flop using Universal Gate
Exp 9B : Realization of JK Flip flop using Universal GateQ. Implement F(P,Q,R,S) = ∑m(1,4,6,9,12,14) using gate.
Q. Implement F(P,Q,R,S) = ∑m(1,4,6,9,12,14) using gate.EXP 3: Familiarization with Exclusive Gate
EXP 3: Familiarization with Exclusive GateExp 4 : Binary to Gray Conversion and vice versa
Exp 4 : Binary to Gray Conversion and vice versaExp 6: Half Subtractor and Full Subtractor Circuit
Exp 6: Half Subtractor and Full Subtractor CircuitExp 8A: Study of 1-bit Magnitude Compactor
Exp 8A: Study of 1-bit Magnitude CompactorExp 9A: Familiarization with SR and D flip Flop
Exp 9A: Familiarization with SR and D flip FlopASYNCHRONOUS MOD 12 COUNTER
ASYNCHRONOUS MOD 12 COUNTER