project.name

Subhrajyoti_Dutta_20220STA066

Member since: 3 years

Educational Institution: Banaras Hindu University

Country: India

BCD to Excess 3

BCD to Excess 3
Public
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OR using NAND

OR using NAND
Public
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NOT using NAND

NOT using NAND
Public
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AND using NAND

AND using NAND
Public
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OR using NOR

OR using NOR
Public
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NOT using NOR

NOT using NOR
Public
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XOR using basic gates

XOR using basic gates
Public
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AND using NOR

AND using NOR
Public
project.name

XNOR using basic gates

XNOR using basic gates
Public
project.name

Half Adder

Half Adder
Public
project.name

Full Subtractor

Full Subtractor
Public
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4:1 MUX

4:1 MUX
Public
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2's complement

2's complement
Public
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Half Adder

Half Adder
Public
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SR-Latch NOR

SR-Latch NOR
Public
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SR-Latch with Control Unit NAND

SR-Latch with Control Unit NAND
Public
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JK Flip Flop NAND

JK Flip Flop NAND
Public
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D Flip Flop NAND

D Flip Flop NAND
Public
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T Flip Flop NAND

T Flip Flop NAND
Public
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JK Flip Flop AND NOR

JK Flip Flop AND NOR
Public
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D Flip-Flop 3.3

D Flip-Flop 3.3
Public
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JK Flip-Flop 3.3

JK Flip-Flop 3.3
Public
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M-S JK Flip Flop NAND

M-S JK Flip Flop NAND
Public
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SR-Latch NAND

SR-Latch NAND
Public
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BCD To 7-Segment Decoder

BCD To 7-Segment Decoder
Public
project.name
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