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Udbhav

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EXPERIMENT 6: To verify the truth tables of 8x1 multiplexer

EXPERIMENT 6: To verify the truth tables of 8x1 multiplexer
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EXPERIMENT 7: To verify the truth tables of 3 bit Decoder

EXPERIMENT 7: To verify the truth tables of 3 bit Decoder
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4-Bit Shift Register (RS)

4-Bit Shift Register (RS)
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Experiment 4: Implement A.(B' + C) using minimum number of NAND Gates

Experiment 4: Implement A.(B' + C) using minimum number of NAND Gates
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4-Bit Shift Register (RS)

4-Bit Shift Register (RS)
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EXPERIMENT 12: Verification of truth table of four-bit bidirectional shift register

EXPERIMENT 12: Verification of truth table of four-bit bidirectional shift register
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EXP-17

EXP-17
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EXPERIMENT 9: To design and implement a logic circuit for full subtractor using NAND gates

EXPERIMENT 9: To design and implement a logic circuit for full subtractor using NAND gates
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