project.name

Lokesh Pandey

Member since: 2 years

Educational Institution: Not Entered

Country: Not Entered

expriment1:All logic gates

expriment1:All logic gates
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expriment1:All logic gates
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DECMENTER(FA)

DECMENTER(FA)
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DECMENTER(FA)
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INCREMENTER(FA)

INCREMENTER(FA)
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INCREMENTER(FA)
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4:1 CASCADE

4:1 CASCADE
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4:1 CASCADE
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ARITHMETIC UNIT

ARITHMETIC UNIT
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ARITHMETIC UNIT
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COMPOSITE UNIT

COMPOSITE UNIT
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COMPOSITE UNIT
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experiment2:half adder and substractor

experiment2:half adder and substractor
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experiment2:half adder and substractor
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RIPPLE SUBSTRACTOR

RIPPLE SUBSTRACTOR
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RIPPLE SUBSTRACTOR
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Experiment 4:Full adder using two half adder

Experiment 4:Full adder using two half adder
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Experiment 4:Full adder using two half adder
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2:1 MUX CASCADE

2:1 MUX CASCADE
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2:1 MUX CASCADE
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LOGIC UNIT and Logiic gates

LOGIC UNIT and Logiic gates
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LOGIC UNIT and Logiic gates
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INCREMENTER

INCREMENTER
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INCREMENTER
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4-Bit Incrementer

4-Bit Incrementer
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4-Bit Incrementer
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BCD

BCD
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BCD
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experiement 3: full adder and substractor

experiement 3: full adder and substractor
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experiement 3: full adder and substractor
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RIPPLE CARRY

RIPPLE CARRY
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RIPPLE CARRY
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Lokesh Pandey is not a collaborator of any project.

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