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Incubated From:
Author: Milton Romero
Project access type: Public
Description:
Design a 4-bit shift register that can perform the following eight operations:
> Hold, S2S1S0 = 000
> logical shift right, S2S1S0 = 001
> logical shift left, S2S1S0 = 010
> circular shift right, S2S1S0 = 011
> circular shift left, S2S1S0 = 100
> arithmetic shift right (shift in the MSB to the right), S2S1S0 = 101
> arithmetic shift left, S2S1S0 = 110
> parallel load, S2S1S0 = 111
Created: Dec 04, 2021
Updated: Aug 27, 2023
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