HeangSopagna-ITC-CSL-TD4
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Author: Heang SoPagna

Project access type: Public

Description:

Design circuit for even parity generator and checker for error detection. 

Exercises Description: https://drive.google.com/drive/folders/1MQ_HTwUoI3YVg-5L-ja2K34Defl7FWBp?usp=sharing

Created: May 15, 2021

Updated: Feb 12, 2024


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