SIDDHIKA SINGH - Circuits

SIDDHIKA SINGH

Member since: 3 years

Educational Institution: Not Entered

Country: Not Entered

Full Adder

Full Adder

Public

project.name

Demultiplexer(DEMUX)

Demultiplexer(DEMUX)

Public

project.name

AND gate

AND gate

Public

project.name

OR gate

OR gate

Public

project.name

OR gate

OR gate

Public

project.name

NOT gate

NOT gate

Public

project.name

AND gate

AND gate

Public

project.name

OR gate

OR gate

Public

project.name

NAND gate

NAND gate

Public

project.name

XNOR gate

XNOR gate

Public

project.name

NOR gate

NOR gate

Public

project.name

XOR gate

XOR gate

Public

project.name

NAND gate as OR gate

NAND gate as OR gate

Public

project.name

NAND gate as NOT gate

NAND gate as NOT gate

Public

project.name

NOR gate as OR gate

NOR gate as OR gate

Public

project.name

NOR gate as AND gate

NOR gate as AND gate

Public

project.name

NOR gate as NOT gate

NOR gate as NOT gate

Public

project.name

NAND gate as AND gate

NAND gate as AND gate

Public

project.name

full adder

full adder

Public

project.name

full adder

full adder

Public

project.name

full adder

full adder

Public

project.name

Half Adder

Half Adder

Public

project.name

half adder

half adder

Public

project.name

Half Subtractor

Half Subtractor

Public

project.name

Full adder

Full adder

Public

project.name

Untitled

Untitled

Public

project.name

Multiplexer(MUX)

Multiplexer(MUX)

Public

project.name

half adder

half adder

Public

project.name

ENCODER

ENCODER

Public

project.name

DECODER

DECODER

Public

project.name

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