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Lab 5
Lab 5Experiment 3 Part A
Experiment 3 Part AExperiment 3 Part B
Experiment 3 Part BEXPERIMENT 4 QUESTION 1
EXPERIMENT 4 QUESTION 1EXPERIMENT 4 QUESTION4
EXPERIMENT 4 QUESTION4Experiment 1 Inverter with Clocks and Flags
Experiment 1 Inverter with Clocks and FlagsExperiment 1 3 Input And Gate
Experiment 1 3 Input And GateExperiment 1 2 Input AND Gate
Experiment 1 2 Input AND GateExperiment 1 2 Input OR Gate
Experiment 1 2 Input OR GateExperiment 1 2 Input NAND Gate with Clock
Experiment 1 2 Input NAND Gate with ClockExperiment 2 AND OR Gate
Experiment 2 AND OR GateExperiment 2 NAND Gate Only
Experiment 2 NAND Gate OnlyExperiment 1 2 Input NOR Gate with Clock
Experiment 1 2 Input NOR Gate with ClockExperiment 2 XOR Gate
Experiment 2 XOR GateExperiment 3 JK Flipflop
Experiment 3 JK FlipflopExperiment 3 D Flipflop
Experiment 3 D FlipflopExample during lab 6
Example during lab 6LAB TEST JULY 2020
LAB TEST JULY 2020LAB TEST 2020 JAN
LAB TEST 2020 JANExperiment 4 Half Adder CARRY NAND
Experiment 4 Half Adder CARRY NANDExperiment 3 Half Adder NAND SUM
Experiment 3 Half Adder NAND SUMExperiment 4 Half Adder XOR
Experiment 4 Half Adder XORExperiment 4 Half Adder AND
Experiment 4 Half Adder ANDEX 5
EX 5LAB TEST 2021
LAB TEST 2021Experiment 4 Half Adder with CLK
Experiment 4 Half Adder with CLKExperiment 1 Inverter
Experiment 1 Inverter