Lab 5

Experiment 3 Part A

Experiment 3 Part B

EXPERIMENT 4 QUESTION 1

EXPERIMENT 4 QUESTION4

Experiment 1 Inverter with Clocks and Flags

Experiment 1 3 Input And Gate

Experiment 1 2 Input AND Gate

Experiment 1 2 Input OR Gate

Experiment 1 2 Input NAND Gate with Clock

Experiment 2 AND OR Gate

Experiment 2 NAND Gate Only

Experiment 1 2 Input NOR Gate with Clock

Experiment 2 XOR Gate

Experiment 3 JK Flipflop

Experiment 3 D Flipflop

Example during lab 6

LAB TEST JULY 2020

LAB TEST 2020 JAN

Experiment 4 Half Adder CARRY NAND

Experiment 3 Half Adder NAND SUM

Experiment 4 Half Adder XOR

Experiment 4 Half Adder AND

EX 5

LAB TEST 2021

Experiment 4 Half Adder with CLK

Experiment 1 Inverter