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Syn-Counter
Syn-Countertrail
trailAND
ANDkavi
kaviUntitled
UntitledShift Registers
Shift RegistersLatch Vs Flip-Flop
Latch Vs Flip-FlopDemo
Demo1234_Q4
1234_Q4Shift Registers
Shift RegistersLogical gates
Logical gatesCounters
CountersSIMULATION
SIMULATIONBCD-7Seg
BCD-7SegLatch Vs Flip-Flop
Latch Vs Flip-FlopJ K FlipFlop
J K FlipFlopENCODERS AND DECODERS
ENCODERS AND DECODERSParallel Adder
Parallel AdderMOD Counter
MOD CounterRS Flipflop
RS FlipflopRS latch
RS latchLogical gates
Logical gateskavi
kavikavi1
kavi1Test
TestXOR
XORD Flip Flop
D Flip FlopRipple UpCounter
Ripple UpCountertest2
test22047024_xor_using_nand
2047024_xor_using_nandCIA_2047022
CIA_20470222047004
20470042047006
20470062041063_ESETest3
2041063_ESETest3Dipta Roy-2047003
Dipta Roy-20470032047003_Component 2
2047003_Component 22047022_CIA_5
2047022_CIA_5CIA_5_2047020-MOD 20
CIA_5_2047020-MOD 202047014_CIA-Component 5
2047014_CIA-Component 5priyangka_2047005_cia5_comp_final
priyangka_2047005_cia5_comp_finalRegisters
RegistersShift Registers
Shift RegistersQ9
Q9DCF CIA 2
DCF CIA 2