project.name

DESHA JAYA SAI MANJUNATH-CSEUG-2020 BATCH

Member since: 4 years

Educational Institution: kalasalingam academy of research an education

Country: India

Shift Register(Sin and Pout)

Shift Register(Sin and Pout)
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multiplexer

multiplexer
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Encoder

Encoder
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sample eq1

sample eq1
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sample eq2

sample eq2
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DEMUX

DEMUX
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Half and Full Subtractor

Half and Full Subtractor
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Asynchronous Counters

Asynchronous Counters
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Comparator

Comparator
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Flip Flop

Flip Flop
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Full Adder

Full Adder
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Shift registers

Shift registers
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Basic Gates

Basic Gates
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Parity

Parity
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half and full adder

half and full adder
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BASIC LOGIC GATES

BASIC LOGIC GATES
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Code Converters

Code Converters
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Decoder

Decoder
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