project.name

S Shri Pranesh Kumar

Member since: 3 years

Educational Institution: SRM INSTITUTE OF SCIENCE AND TECHNOLOGY

Country: India

expt 4 flip flops

expt 4 flip flops
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sipo

sipo
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siso

siso
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MUX by 058

MUX by 058
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async mod 5 up counter

async mod 5 up counter
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logic gates(058)

logic gates(058)
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magnitude comparator by 058

magnitude comparator by 058
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4 bit sync down counter

4 bit sync down counter
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4 bit async up/down counter

4 bit async up/down counter
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piso

piso
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2) Y = (A'B+C) Xnor (AC'+BC) by 058

2) Y = (A'B+C) Xnor (AC'+BC) by 058
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binary to xs3 by 58

binary to xs3 by 58
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assignment 1 Q3

assignment 1 Q3
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assignment 1 Q2

assignment 1 Q2
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assignment 1 Q1

assignment 1 Q1
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assignment 1 Q4

assignment 1 Q4
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2x4 decoder by 58

2x4 decoder by 58
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bcd to gray code by 058

bcd to gray code by 058
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full adder by 058

full adder by 058
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4 bit async up counter

4 bit async up counter
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full subtractor by 58

full subtractor by 58
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pipo

pipo
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3bit sync upcount

3bit sync upcount
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4x2 encoder

4x2 encoder
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half adder by 058

half adder by 058
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3 bit async down counter

3 bit async down counter
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1) Y = A xor B = AB'+A'B by 058

1) Y = A xor B = AB'+A'B by 058
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DEMUX by 058

DEMUX by 058
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3 bit sync up/down counter

3 bit sync up/down counter
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half subtractor by 58

half subtractor by 58
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