2:1 multiplexer
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Author: Soumoydip Halder

Forked from: Laurynas/2:1 multiplexer

Project access type: Public

Description:

Notes***

The S (select input) determines which one of the inputs passes to output by using one inverter 

AND gates are used to filter the right input further 

OR gate is used because both inputs may be 1 but the last stage will have 1 and 0 as the other value does not pass the AND gate (helps to not confuse which input has to pass to the output)

Created: Apr 28, 2021

Updated: Aug 26, 2023


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