virat
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BCD TO 7 SEGMENT
BCD TO 7 SEGMENT
Public
Sift Register (PISO)
Sift Register (PISO)
Public
Untitled
Untitled
Public
Design SISO register
Design SISO register
Public
SEM1
SEM1
Public
SEM 1.1
SEM 1.1
Public
yj
yj
Public
Untitled
Untitled
Public
Design Excess-3 to BCD conversion circuit
Design Excess-3 to BCD conversion circuit
Public
Decoder 7 seg CC
Decoder 7 seg CC
Public
3*8 Multiplexer
3*8 Multiplexer
Public
NAND gate
NAND gate
Public
Design BCD to Excess-3 conversion circuit.
Design BCD to Excess-3 conversion circuit.
Public
1 .SR flip-flop to D flip-flop. 2. D flip-flop to T flip-flop. 3. JK flip-flop to T flip-flop
1 .SR flip-flop to D flip-flop. 2. D flip-flop to T flip-flop. 3. JK flip-flop to T flip-flop
Public
Design a 3-bit synchronous counter that count in straight binary (starting from 000) using D- f/f.
Design a 3-bit synchronous counter that count in straight binary (starting from 000) using D- f/f.
Public
Untitled
Untitled
Public
Design Half Adder using NAND gate
Design Half Adder using NAND gate
Public
BCD to 7 segment decoder
BCD to 7 segment decoder
Public
Untitled
Untitled
Public
Design a 3-bit synchronous MOD-3 counter using JK - f/f
Design a 3-bit synchronous MOD-3 counter using JK - f/f
Public
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