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VIKNISH SATHASIVEM

Member since: 4 years

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Ring Counter

Ring Counter
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Circuit 3.3

Circuit 3.3
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Decoders

Decoders
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Half Adder using Decoder

Half Adder using Decoder
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full adder using nand gate

full adder using nand gate
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Untitled

Untitled
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Decoders

Decoders
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Decoders

Decoders
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Decoders

Decoders
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Full Adder using NOR gate

Full Adder using NOR gate
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LSB

LSB
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LSB

LSB
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vikender 4 bit asynchronous up counter

vikender 4 bit asynchronous up counter
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ASYNCHRONOUS 4 BIT UP COUNTER

ASYNCHRONOUS 4 BIT UP COUNTER
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ASYNCHRONOUS 4BIT DOWN

ASYNCHRONOUS 4BIT DOWN
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BCD Counter

BCD Counter
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ring counter

ring counter
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SISO

SISO
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PISO

PISO
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Shift Register - SIPO mode

Shift Register - SIPO mode
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Half Adder using Decoder

Half Adder using Decoder
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Shift Register - PIPO Mode

Shift Register - PIPO Mode
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VIKNISH SATHASIVEM is not a collaborator of any project.

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