II )   DESCRIPTION

        >  first use  two 8 input priority encoder(active low) and  give the 16 inputs (0 - 15) with 0-7 connected to  one 8:3 encoder and other 8 to another.

        >  give an input EI to the encoder(with inputs 8-15) 

        >  then connect the EO of encoder with inputs 8-15 as the EI of the encoder with inputs 1-7

        > connect the respective A0 of one encoder and and A0 of second encoder and add(booolean addition) them  as this is a active low encoder . if eihter of the is 0  the                       output would come as 0.

        > similarly repeat this with A1 and A2 and these 3 outputs will be A0,A1,A2 respectively.

        > the output GS of encoder with inputs 8-15 would give A3 as it is 1(low) only when  all the inputs of that encoder (excluding EI) are  1(low). this is equal to A3.

        > EO of the encoder with 1-7 inputs is the final output EO .  

        > the output GS(for total 16:4 encoder) is given by GS = ( EI  +  ( A0 . A1 . A2 . A3 )' ).

        > add a NOT gate to all these outputs and inputs and connect LEDs to all those not gates.

        > this is a 16:4 input priority encoder with total 6 outputs ( GS , A3 , A2 , A1 , A0 , EO )

III)   Construction of 32:5 PE from 8:3 PE

       >  to create an 32:5 encoder with 0-31 inputs , use  four 8:3 input encoders to create two 16:4 input encoders   (as described  in the part (II) 16:4 encoder question)

       > similiar to buliding of 16:4 encoder from 8:3 encoders connect these two 16:4 encoders in such way that EI is given to the encoder which takes inputs 16-31 and connect              the EO of this encoder to the EI of other encoder and calculate the values of A1,A2,A3,A4 by using AND gates like in 16:4 encoder construction.

       > the EO of the 16:4 encoder with 0-15 inputs gives the final output EO of the 32:5 encoder and  GS of encoder with 6-31 inputs is equal to the value of A4.

       > output GS of this 32:5 encoder is given by GS = (  EI + ( A0 . A1 . A2 . A3 . A4 )'  )  

IV )     DIFERENCE BETWEEN 'X' AND 'Z' IN A LOGIC CIRCUIT.

  X represents an illegal value and Z represents a floating value. X occurs when it is connected or driven to 'HIGH' and 'LOW' at the same time and represents an error in the circuit and this situation is called  contention usually occurs when node is connected to  '0' and '1'  simultaneously. floating value Z indicates that the node is neither being driven high or low and node may be connected to any value of logic between 0 and 1 including both 0 and 1 depending on other parameters and indicates high impedance state and doesn't indicate  any error and usually occurs while tristate buffers  are being used.