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Aritra Kundu

Member since: 4 years

Educational Institution: Not Entered

Country: Not Entered

Full Adder using NAND and NOR gates

Full Adder using NAND and NOR gates
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half subtractor

half subtractor
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2 to 4 line single bit decoder

2 to 4 line single bit decoder
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1x4 De-Multiplexer

1x4 De-Multiplexer
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8*1 MULTIPLEXER

8*1 MULTIPLEXER
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Experiment-2

Experiment-2
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H.A. using nor gate and H.A. using XOR , AND gate

H.A. using nor gate and H.A. using XOR , AND gate
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1x4 Demux using 2 to 4 Decoder

1x4 Demux using 2 to 4 Decoder
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