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Vicky Singh

Member since: 4 years

Educational Institution: Ajay Kumar Garg Engineering College

Country: India

Gray to Binary Code

Gray to Binary Code
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T flip flop

T flip flop
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SR flip flop

SR flip flop
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D flip flop and d latch

D flip flop and d latch
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Full Adder using Basic Logic

Full Adder using Basic Logic
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Half adder

Half adder
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4x1 Multiplexer

4x1 Multiplexer
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8 bit ALU

8 bit ALU
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8x1 Muliplexer

8x1 Muliplexer
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3-8 Line Decoder

3-8 Line Decoder
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JK flip flop

JK flip flop
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8-bit input output system with four 8-bit internal registers

8-bit input output system with four 8-bit internal registers
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Binary to gray conversion

Binary to gray conversion
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data path of a computer from its register transfer

data path of a computer from its register transfer
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Half Adder Using Basic Gates

Half Adder Using Basic Gates
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