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1 to 4 DEMUX
1 to 4 DEMUX1 to 2 Decoder
1 to 2 DecoderFull adder
Full adder2 Bit magnitude comparator
2 Bit magnitude comparatorverification of logic gates using EX-NOR(Y=(AB'+AB')')
verification of logic gates using EX-NOR(Y=(AB'+AB')')verification of logic gates using EX-OR gate(Y=A'B+AB')
verification of logic gates using EX-OR gate(Y=A'B+AB')Boolean Posculates
Boolean Posculates16 to 1 mux
16 to 1 muxHalf adder using NOR gate
Half adder using NOR gateHalf adder
Half adderDistributive law
Distributive lawConsensus theorum
Consensus theorumAssociative property
Associative property3 Bit parity generator
3 Bit parity generatorFull adder using NOR gate
Full adder using NOR gateDemorgans theorum
Demorgans theorumFull adder using NAND gate
Full adder using NAND gate4 Bit parity generator
4 Bit parity generatorFull substractor
Full substractorHalf subtractor
Half subtractor2 to 1 MUX
2 to 1 MUX4 Bit parity checker
4 Bit parity checker4 Bit magnitude comparator
4 Bit magnitude comparator1:8 DEMUX
1:8 DEMUXBinary to Gray code coverter
Binary to Gray code coverterBCD to Excess-3 converter
BCD to Excess-3 converter1 to 2 DEMUX
1 to 2 DEMUX2 to 1 MUX using OR gate
2 to 1 MUX using OR gateIMPLEMINTEMS WITH 2:1 MUX
IMPLEMINTEMS WITH 2:1 MUXIMPLEMENTATION USING MINTERMS WITH 8:1 MUX
IMPLEMENTATION USING MINTERMS WITH 8:1 MUX32 to 1 mux using 4 to 1 mux
32 to 1 mux using 4 to 1 mux4 to 2 priority encoder
4 to 2 priority encoder2 to 4 Decoder
2 to 4 Decoder4 to 16 Decoder
4 to 16 Decoder2 to 1 Encoder
2 to 1 Encoder2 to 1 Encoder
2 to 1 Encoder1 to 2 decoder
1 to 2 decoderHalf subtractor using NOR gate
Half subtractor using NOR gateBCD to 7 segment decoder
BCD to 7 segment decoderSingle bit magnitude comparator
Single bit magnitude comparatorIMPLEMENTATION USING MINTERMS WITH 4:1 MUX
IMPLEMENTATION USING MINTERMS WITH 4:1 MUX2 to 1 MUX using NAND gate
2 to 1 MUX using NAND gate2 to 1 MUX using NOT gate
2 to 1 MUX using NOT gateLOGIC GATE VERIFICATION USING NOT GATE (Y=A')
LOGIC GATE VERIFICATION USING NOT GATE (Y=A')3 bit parity checker
3 bit parity checkerFull subtractor using NOR gates
Full subtractor using NOR gateslogic gates verification using NOR gate(Y=(A+B)')
logic gates verification using NOR gate(Y=(A+B)')single Bit MSagnitude comparator
single Bit MSagnitude comparatorAbsorption theorum
Absorption theorumLOGIC GATES VERIFICATION BY OR GATES (Y=A+B)
LOGIC GATES VERIFICATION BY OR GATES (Y=A+B)Full subtrator using NAND gate
Full subtrator using NAND gateGray to binary code converter
Gray to binary code converter3 to 8 decoder
3 to 8 decoder1:16 DEMUX
1:16 DEMUX1:8 DEMUX
1:8 DEMUXOctal to Binary Encoder
Octal to Binary Encoder8 to 1 mux
8 to 1 mux4 to 2 priority encoder
4 to 2 priority encoderDecimal to BCD Encoder
Decimal to BCD EncoderLOGIC GATES VERIFICATION BY AND GATES
LOGIC GATES VERIFICATION BY AND GATESExcess-3 to BCD convertor
Excess-3 to BCD convertorHalf adder using NAND gate
Half adder using NAND gate24 to 1 MUX using 8 to 1 MUX
24 to 1 MUX using 8 to 1 MUX4 to 1 MUX
4 to 1 MUXlogic gates to prove commutative property for multiplication
logic gates to prove commutative property for multiplicationHalf subtractor using NAND gate
Half subtractor using NAND gate8 TO 3 PRIORITY ENCODER
8 TO 3 PRIORITY ENCODER2 to 1 MUX using NOT gate
2 to 1 MUX using NOT gate4 to 2 Encoder
4 to 2 Encoderlogic gates for commutative property using addition(A+B=B+A)
logic gates for commutative property using addition(A+B=B+A)BCD to Decimal Decoder
BCD to Decimal Decoderlogic gates verification by using NAND gate(Y=(A.B)')
logic gates verification by using NAND gate(Y=(A.B)')IMPLEMENTATION USING MINTERMS WITH 16:1 MUX
IMPLEMENTATION USING MINTERMS WITH 16:1 MUX